Open HPSDR Hermes (14 bit ADC, EP3C25) Transceiver Card (Assembled & Tested)

$389.00
  • Description
  • Technical Specifications

Please note that due to a delay in delivery of the PHY Chip KSZ9021RL the delivery schedule has been delayed by 4-6 weeks, our factory is on standby and will commence production ASAP on receipt of this part from our supplier, expected ship date is early May 2022.

UPDATE- 10/05/22 We are actively pursuing the PHY Chip delivery information with the supplier and will update our website as soon as possible.

This is a special group order based on community demand, boards are being manufactured and sold at cost, Apache Labs will be

producing a limited batch of 250 nos only.  (154 units sold as on 11/02/2022, 96 units available as of 11/02/2022)

Please note - Shipping will be charged at actuals.

* 90 Day Warranty against Manufacturing defects
* Factory Assembled & Tested
* Immersion gold plated 8 layer PCB
* The Customer is responsibe for any Duties, Taxes or levies charged by customs during import


Declarations of Conformity
The OpenHPSDR Hermes Transceiver complies with FCC Part 97 rules for the Amateur Radio Service.

Specifications & Highlights:

  • Continuous, uninterrupted, receive coverage from 10KHz to 55MHz.
  • Supports Real-Time display of entire sectrum from 0-55mHz (with suitable PC software)
  • Supports 2 fully independent receivers (sharing the same antenna - and with suitable PC software)
  • Each receiver can display 48/96/192kHz of spectrum
  • Blocking Dynamic Range (ARRL Method) no detectable gain compression below ADC overload
  • Transmit and receiver image rejection > 110dB
  • Full duplex operation, any split over entire 160m to 6m range.
  • Transmitter two-tone 3rd order IMD of -50dBc on 20m @ 400mW output
  • 500mW RF output on 160 – 10m amateur bands, 350mW on 6m
  • Built-in high performance preamp, with a noise floor typically -135dBm in 500Hz
  • Software-selectable 31dB input attenuator in 1dB steps
  • High performance receiver – same specifications as the HPSDR Mercury receiver (ie Dynamic Range typically 125dB)
  • FPGA code can be updated via the Industry Standard TCP/IP network Ethernet connection
  • Seven user-configurable open-collector outputs, independently selectable per band and Tx/Rx (for relay control, etc - with sequencing via PC code)
  • Separate open-collector PTT connection for amplifier control, etc, with sequencer
  • Microphone PTT jumper-selectable from tip or ring connection
  • Bias for electret microphones via jumper
  • Four user-configurable 12 bit analogue inputs (for ALC, SWR etc)
  • Three user-configurable digital inputs (for linear amplifier over temperature, etc)
  • Can operate from a 13.8v DC supply or 12v and 5v supplies
  • Jumper selected in-built low noise and high efficiency switch mode power supply designed by Kjell Karson,LA2NI – less than 600mA (receive - one receiver) from a 13.8V supply
  • I2C bus connector for control of external equipment
  • Full QSK operation (performance dependant on associated PC and control software)
  • Low-level transmitter output for transverter use via user-selectable output attenuator
  • Stereo audio outputs at line and headphone levels
  • In-built 1W stereo audio amplifier for directly driving speakers
  • Direct, de-bounced connections for a Morse key (straight or iambic) and PTT
  • Low phase noise (-137dBc/Hz @ 1kHz) 122.88MHz master clock, which can be phase-locked to an internal 10MHz TCXO or external fequency reference
  • Low phase noise (-140dBc/Hz @ 1kHz at 14MHz) 122.88MHz master clock, which can be phase-locked to an internal 10MHz TCXO or external frequency reference
  • Direct ribbon cable interface to Apollo 15W power amplifier, low pass filters and automatic ATU
  • Industry Standard TCP/IP network Ethernet interface supports static, APIPA or DHCP IP address
  • Hermes responds to ping and ARP requests and auto senses network connection speed
  • Eight (8) Layer PCB design for the most professional, state-of-the-art, design available.

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